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» 2025
» Feb-07-2025
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| ISE 2025, Integrated Systems Europe, Barcelona |
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Alma Technologies was hosted at the AMD booth in ISE2025 to demonstrate its Ultra-High Throughput VESA® DSC 1.2b Decoder IP, the UHT-DSC-D, running 8K60 with the AMD HDMI™ 2.1 IP subsystem.
The UHT-DSC-D core provides a fully compliant VESA DSC decoder solution to uncompress ultra-high pixel rate DSC compressed HDMI and DisplayPort streams for further processing of the uncompressed pixel data in a SoC or FPGA system.
The demo was based on the AMD Versal™ VEK280 Evaluation Kit, leveraging its bult-in HDMI 2.1 Rx and Tx capabilities. The VEK280 acted as both an HDMI 2.1 sink and source, receiving a DSC compressed 8K60-4:4:4 video signal from an HDMI 2.1 laptop source, extending the laptop’s screen as a second display. The DSC stream output of the AMD HDMI™ 2.1 Rx IP subsystem was getting processed on-the-fly, first decompressed by the UHT-DSC-D core and then converted to 8K60-4:2:0 in order to transmit it uncompressed from the HDMI 2.1 Tx output of the board, driving a 40 Gbps FRL capable 8K display.
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RELATED IP CORES |
Ultra-High Throughput VESA DSC 1.2b Decoder
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